1. Field of the Invention
The present invention relates to an evaluation technique related to semiconductor device manufacture.
2. Description of the Background Art
In current semiconductor device manufacture, an underlying layer such as wafer (also called “semiconductor substrate”), etc. is subjected to selective processing by performing etching or ion implantation. In this instance, for the purpose of protecting the underlying layer, a photoresist is formed which is a composition photosensitive to active light such as ultraviolet, X-ray, and electron beam. The photoresist is then patterned according to the shape of portions of the underlying layer to be processed, thereby forming a resist pattern.
In the resist pattern forming method in general use, ultraviolet irradiation is performed by a reduction-projection aligner that is called “stepper” and uses, as light source, g-line of mercury lamp (436 nm in wavelength), i-line of mercury lamp (365 nm in wavelength), KrF excimer laser (248 nm in wavelength), or ArF excimer laser (193 nm in wavelength). Specifically, a photoresist formed on a wafer is subjected to exposure by using, as photomask, one that is called “reticle” and obtained by forming a circuit pattern with a shielding film such as of chromium (Cr), on a glass substrate. The circuit pattern drawn on the photomask is transferred to the photoresist on reduced scale. The photoresist is then subjected to development, thereby forming a predetermined pattern in the photoresist. For reference, in the manufacturing steps of semiconductor devices, the step of forming a resist pattern is usually performed about 20 to 30 times.
On the other hand, high integration and high performance of semiconductor devices have been further advanced recently. This trend is to call for further scale-down of resist patterns. For example, in DRAMs (dynamic random access memory) of 64 megabits to 256 megabits that are currently in quantity production, a resist pattern having a line width of 150-200 nm is drawn. In its photolithography step, KrF excimer laser is most frequently used. Further scale-down of resist pattern demands improvements in dimensional accuracy of resist pattern and alignment accuracy between photomask and wafer.
Main factors that affect the dimensional accuracy of resist pattern are exposure energy variations and focus offset variations. FIG. 30 shows the result that is obtained by simulating dimensional variations of resist pattern with respect to variations in exposure energy and focus offset. That is, there is shown dimensional variations in a resist pattern when an isolated line pattern having a line width of 150 nm is formed in a photoresist. Specifically, FIG. 30 shows the simulation results when a resist pattern is formed by exposure of KrF excimer laser with 2/3 annular illumination apertures, at 0.65 in lens numerical aperture NA. In FIG. 30, the horizontal axis represents focus offset, which is a focus distance from a predetermined reference plane in an aligner. Positive values indicate that the focus is located at a lower position (a deep position) of the photoresist than the reference plane. Alphabets “CD” of the vertical axis in FIG. 30 indicates line width of resist pattern obtained by simulation.
Referring to FIG. 30, the line width of resist pattern most closely approaches 150 nm when exposure energy is 44 mJ/cm2 and focus offset is −0.15 μm. Variations in exposure energy and focus offset cause variations in the line width of resist pattern. The formation of high-performance transistor usually requires that dimensional control be within ±10% to design value. For example, if the design value of line width of resist pattern is 150 nm, dimensional accuracy of ±15 nm is necessary. In FIG. 30, two broken lines indicate the range of ±15 nm to a line width of 150 nm. That is, the lower broken line indicates a line width of 135 nm, and the upper broken line indicates a line width of 165 nm. From FIG. 30, exposure tolerance EL and focus tolerance DOF are obtained as follows: EL=3.8% and DOF=0.35 μm. The value “3.8%” is a value obtained by standardizing the range of exposure energy variations that falls in the range of 150 nm±10%, by exposure energy of 44 mJ/cm2. The value “0.35 μm” is a range of variations in focus offset when the line width of resist pattern falls in the range of 150 nm±10%, at an exposure energy of 44 mJ/cm2.
As stated above, as the scale-down of resist pattern proceeds, exposure tolerance EL and focus tolerance DOF when forming the resist pattern are extremely narrow. In order to stably form a resist pattern under such a narrow process tolerance, it is necessary to evaluate the age-based amounts of variations in focus offset and exposure energy. Specifically, in the manufacturing steps of semiconductor device, focus offset or exposure energy may vary between different manufacturing lots. Therefore, it is desirable that the amount of variation be found and evaluated and then exposure conditions be corrected as required. Not only the amount of variations in exposure energy and focus offset but also coat uniformity of photoresist and sensitivity stability of photoresist, etc. affect focus tolerance DOF and exposure tolerance EL. It is therefore necessary to evaluate each of these items.
As a method of evaluating the age-based amount of variations in focus offset and exposure energy, there has conventionally been proposed a method including the steps of measuring a line width of a line pattern or space pattern formed in a photoresist to obtain a measuring result; and evaluating their respective amount of variations. FIG. 31 shows a test pattern used in a conventional evaluation method. This conventional test pattern has an isolated line pattern 200 having a line width of t1, and an isolated space pattern 201 having a line width of t2. For instance, this test pattern is formed in a photoresist every time the manufacturing lot of a semiconductor device changes, and the line width t1 of the line pattern 200 and line width t2 of the space pattern 201 are measured. As described above, the variations in exposure energy and focus offset causes variations in the line width of resist pattern. Accordingly, when exposure energy and focus offset are varied between manufacturing lots, line widths t1 and t2 are also varied. Therefore, the age-based amount of variations in exposure energy and focus offset can be evaluated by measuring line widths t1 and t2. This makes possible to correct the manufacturing conditions of a semiconductor device based on the results so evaluated. Further, the semiconductor device can be manufactured under the corrected manufacturing conditions.
However, sufficient reliability cannot be obtained with the evaluation method using the measuring results of the line widths of line pattern and space pattern formed in a photoresist.